| Numéro |
J. Phys. IV France
Volume 06, Numéro C3, Avril 1996
WOLTE 2Proceedings of the Second European Workshop on Low Temperature Electronics |
|
|---|---|---|
| Page(s) | C3-3 - C3-11 | |
| DOI | https://doi.org/10.1051/jp4:1996301 | |
WOLTE 2
Proceedings of the Second European Workshop on Low Temperature Electronics
J. Phys. IV France 06 (1996) C3-3-C3-11
DOI: 10.1051/jp4:1996301
Laboratoire de Physique des Composants à Semiconducteurs, UMR CNRS, ENSERG, 23 rue des Martyrs, BP 257, 38016 Grenoble, France
© EDP Sciences 1996
Proceedings of the Second European Workshop on Low Temperature Electronics
J. Phys. IV France 06 (1996) C3-3-C3-11
DOI: 10.1051/jp4:1996301
Characterization and Modeling of Silicon CMOS Transistor Operation at Low Temperature
G. Ghibaudo and F. BalestraLaboratoire de Physique des Composants à Semiconducteurs, UMR CNRS, ENSERG, 23 rue des Martyrs, BP 257, 38016 Grenoble, France
Abstract
A brief review of the main physical results about the low temperature characterization and modeling of Si CMOS devices is presented. More specifically, the carrier mobility law, the saturation velocity, the short channel effects, the impact ionization phenomenon, the hot carrier effects or the parasitic leakage current are physically discussed.
© EDP Sciences 1996