Low temperature operation of graded-channel SOI nMOSFETs for analog applications

M.A. Pavanello; P.G. Der Agopian1; J.A. Martino; D. Flandre

doi:doi:10.1051/jp420020030

Numéro		J. Phys. IV France Volume 12, Numéro 3, May 2002


Page(s)		23 - 26
DOI		https://doi.org/10.1051/jp420020030

J. Phys. IV France 12 (2002) Pr3-23
DOI: 10.1051/jp420020030

Low temperature operation of graded-channel SOI nMOSFETs for analog applications

M.A. Pavanello^{1, 2}, P.G. Der Agopian1¹, J.A. Martino¹ and D. Flandre³

¹ Laboratorio de Sistemas Integraveis, University of Sao Paulo, Av. Prof. Luciano Gualberto, Trav. 3 N. 158, 05508-900 Sao Paulo, Brazil
² Center for Semiconductor Components, State University of Campinas, Campinas, Brazil
³ Laboratoire de Microélectronique, Université Catholique de Louvain, Louvain-la-Neuve, Belgium

Abstract
We present in this work is an analysis of the low temperature operation of Graded-Channel fully-depleted Silicon-On-Insulator (SOI) nMOSFETs for analog applications. This analysis is supported by a comparison between the results obtained by MEDICI numerical bidimensional simulations and measurements. The Graded-Channel transistor presents higher Early voltage and transconductance at 100 K if compared to the conventional fullydepleted SOI nMOSFET.