J. Phys. IV France
Volume 124, Mai 2005
Page(s) 321 - 325

J. Phys. IV France 124 (2005) 321-325

DOI: 10.1051/jp4:2005124047

Characterization of interface traps on MOS transistor submicronic by the three level charge pumping

M. Sellami1, M. Bouchemat2, M. Kahouadji3 and F. Djahli0

1  Institute of Electronics, University of Bejaia, 06000 Bejaia, Algeria
2  Institute of Electronics, University of Constantine, 25000 Constantine, Algeria
3  Institute of Electronics, University of Setif, 19000 Setif, Algeria

Because of its efficiency, its high precision and its easy use regarding to classical techniques of Si-Sio2 (C-V, DLTS, Conductance$\ldots$), interface characterization, the charge pumping technique has seen a large evolution these years. Many improvements have been made other, derivation techniques have been developed (at three-level charge pumping, spectroscopic charge pumping $\ldots$) This technique is particularly used for very slight geometry MOS transistors damaging, where other techniques have no utility. This damaging often leads to the creation of a fixed trapped charge in the oxide coat and active electronically defaults in the oxide Semi-conductor interface after the application of ageing constraint (ionizing radiation, injection carrier). This ageing is so pronounced when the dimensions are slight this represents the main obstacle that the microelectronics must face. In this article we simulate the three-level charge pumping technique with SPICE3F4 simulator. This simulation will permit the obtaining of spatial and energetic spread of defaults at the interface.

© EDP Sciences 2005