| Numéro |
J. Phys. IV France
Volume 06, Numéro C3, Avril 1996
WOLTE 2Proceedings of the Second European Workshop on Low Temperature Electronics |
|
|---|---|---|
| Page(s) | C3-145 - C3-149 | |
| DOI | https://doi.org/10.1051/jp4:1996322 | |
Proceedings of the Second European Workshop on Low Temperature Electronics
J. Phys. IV France 06 (1996) C3-145-C3-149
DOI: 10.1051/jp4:1996322
Enhancements and Degradations in Ultrashort Gate GaAs and InP HEMTs Properties at Cryogenic Temperatures : an Overview
F. Aniel1, A. Sylvestre1, Y. Jin2, P. Crozat1, A. de Lustrac1 and R. Adde11 IEF, URA 22 du CNRS, Bât. 220, Université Paris-Sud, 91405 Orsay Cedex, France
2 L2M/CNRS LP20, 196 rue de Ravera, 92220 Bagneux, France
Abstract
Enhanced performances of III-V field effects transistors are generally expected at cryogenic temperatures thanks to the better confinement and the velocity of carriers. An overview of our recent work on ultrashort gate-length HEMTs on GaAs and InP substrates at low temperature is presented in this paper. The compared behavior of the devices and the relative enhancement or degradation of their low and high frequency properties are discussed. The study is based on a set of device experimental characterizations on chip and device simulations. At cryogenic temperatures, trapping effects, impact ionization and classical short channel effects are enhanced while device self-heating associated with large current densities appear to decrease.
© EDP Sciences 1996