Numéro
J. Phys. IV France
Volume 04, Numéro C6, Juin 1994
WOLTE 1
Proceedings of the First European Workshop on Low Temperature Electronics
Page(s) C6-93 - C6-98
DOI https://doi.org/10.1051/jp4:1994615
WOLTE 1
Proceedings of the First European Workshop on Low Temperature Electronics

J. Phys. IV France 04 (1994) C6-93-C6-98

DOI: 10.1051/jp4:1994615

Room and low temperature electrical measurements for the interface characterization of titanium disilicides on silicon from multilayer titanium/silicon structures

P. Revva1, A.G. Nassiopoulos1 and A. Travlos2

1  Institute of Microelectronics, NCSR "Demokritos", P.O. Box 60228, 15310 Aghia Paraskevi Attikis, Athens, Greece
2  Institute of Materials Science, NCSR "Demokritos", P.O. Box 60228, 15310 Aghia Paraskevi Attikis, Athens, Greece


Abstract
The interface of titanium disilicides TiSi2 on silicon formed by electron gun evaporation of silicon/titanium multilayers and subsequent annealing is characterised using current-voltage measurements on specially prepared Schottky diodes in the whole temperature range from room temperature down to 77K. In particular, the influence of the bilayer Si/Ti thickness ratio, ranging between 2 and 3, on the barrier height of the diodes is studied and compared with the case of a diode formed by deposition of a single titanium layer and further annealing. The activation energies derived from the low temperature measurements have shown that the interface of the sample prepared with single layer deposition is more rough than the case of the sample prepared with deposition of multilayers using a bilayer thickness ratio Si/Ti=2.5 which is close to the calculated value for the stoichiometric films.



© EDP Sciences 1994