| Issue |
J. Phys. IV France
Volume 06, Number C3, Avril 1996
WOLTE 2Proceedings of the Second European Workshop on Low Temperature Electronics |
|
|---|---|---|
| Page(s) | C3-13 - C3-18 | |
| DOI | https://doi.org/10.1051/jp4:1996302 | |
Proceedings of the Second European Workshop on Low Temperature Electronics
J. Phys. IV France 06 (1996) C3-13-C3-18
DOI: 10.1051/jp4:1996302
Low-Temperature Modelling of Electron-Velocity-Overshoot Effects on 70-250 nm Gate-Length MOSFETs
J.B. Roldán, F. Gámiz, J.A. López-Villanueva and J.E. CarcellerDepartamento de Electrónica y Tecnología de Computadores, Universidad de Granada, Facultad de Ciencias, Avd. Fuentenueva s/n, 18071 Granada, Spain
Abstract
Modelling of the increase of MOSFET transconductance produced by electron-velocity overshoot as channel lengths are reduced has been performed at low temperature. The results obtained have been compared to room-temperature ones. To accomplish this, the charge-control model has been used to obtain a simple analytical expression to account for electron-velocity overshoot effects on the performance of very short channel MOSFETs. This model can be easily included in circuit simulators of systems with a huge number of components. Experimental verification of the accuracy of this model is provided. The improvement of MOSFET transconductance due to electron-velocity overshoot is found to be greater at low temperature than at room temperature.
© EDP Sciences 1996