Numéro
J. Phys. IV France
Volume 125, June 2005
Page(s) 423 - 425
DOI https://doi.org/10.1051/jp4:2005125099


J. Phys. IV France 125 (2005) 423-425

DOI: 10.1051/jp4:2005125099

High resolution thermoreflectance imaging on transistor arrays with defect-induced leakage

G. Tessier1, C. Filloy1, M.L. Polignano2, I. Mica2, G. Jerosolimski1, S. Holé1 and D. Fournier1

1  UPR A0005 CNRS/UPMC/ESPCI, Laboratoire d'Optique, 10 rue Vauquelin, 75005 Paris, France
2  ST Microelectronics, via Olivetti 2, 20041 Agrate Brianza, Italy


Abstract
Crystal defects are very harmful in present silicon devices when responsible for a source-to-drain junction piping and hence for a transistor leakage current. These effects are difficult to characterise with existing methods. Two transistor arrays including patterns critical for defect formation have been constructed and then characterised using a multiplexed CCD-based thermoreflectance microscope. Since this technique measures heating associated to defects, it does not discriminate dielectric breakdown and actual source-to-drain leakage. Both types of defects, buried under 6 $\mu$m of intermetal and encapsulation dielectric, are clearly detected with a spatial resolution of 350 nm.



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