Numéro
J. Phys. IV France
Volume 08, Numéro PR3, June 1998
Proceedings of the 3rd European Workshop on Low Temperature Electronics
WOLTE 3
Page(s) Pr3-63 - Pr3-66
DOI https://doi.org/10.1051/jp4:1998315
Proceedings of the 3rd European Workshop on Low Temperature Electronics
WOLTE 3

J. Phys. IV France 08 (1998) Pr3-63-Pr3-66

DOI: 10.1051/jp4:1998315

Features of indirect-band-to-band tunneling in an insulated-gate lateral pn junction device on a SIMOX substrate with an ultrathin 10-nm-thick silicon layer

Y. Omura

Department of Electronics, Faculty of Engineering, Kansai University, 3-3-35 Yamate-cho, Suita, Osaka 564, Japan


Abstract
This paper reports the occurrence and nature of negative conductance at temperatures under 100 K in silicon-on-insulator insulated-gate pn-junction devices with a 10-nm-thick silicon layer fabricated on an insulator. Important aspects of indirect tunneling process are characterized using theoretical considerations. A detailed comparison to a device with a 90-nm-thick silicon layer indicates that the strong two-dimensional confinement effect plays an important role, such as a resonant effect between subband levels of p and n regions, in the tunneling property of the device with the 10-nm-thick silicon layer.



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