Performances and physical mechanisms in sub-0.1 µm gate length LDD MOSFETs at low temperature F. Balestra, H. Nakabayashi, M. Tsuno, T. Matsumoto et M. KoyanagiJ. Phys. IV France, 04 C6 (1994) C6-13-C6-18DOI: https://doi.org/10.1051/jp4:1994602